System on chip FPGA designs of a parameterized particle image velocimetry algorithm

Virginie Fresse (1) , Nathalie Bochard (1) , Alain Aubert (1)

1 LHC - Laboratoire Hubert Curien

In this paper, an efficient architecture for Particle Image Velocimetry algorithm is proposed. The aim of this work is the design of a system of chip FPGA that can be adapted to application characteristics (size of image, pixel clock frequency...). From these specifications, the designer defines the suitable number of processing modules. Required resources and execution time can also be predicted before the implementation process that makes the design flow faster and more secure.

Keywords: FPGA Designs; parameterised algorithm; Particle Image Velocimetry; timing and resource predictions

Domains: Embedded Systems

Virginie Fresse, Nathalie Bochard, Alain Aubert. System on chip FPGA designs of a parameterized particle image velocimetry algorithm. IEEE International Symposium on Circuits and Systems, May 2006, Kos, Greece. 4 p. ⟨ujm-00142044⟩