Rapid Prototyping of image analysis algorithms on an adaptive FPGA Architecture

Abstract : The aim of this work is to propose a fast and reliable design flow for the implementation of some image analysis algo-rithms on an adaptive architecture using an FPGA platform. This adaptive architecture is designed in a Globally Asyn-chronous Locally Synchronous (GALS) approach so that the hardware resources are stand-alone modules. Any modifica-tion only affects the target module, not the entire system. The design flow associated to this architecture includes IP li-braries for all reused modules and a high-level development tool called Handle-C for the design of new modules. The image processing designer implements any image analysis algorithm in a reliable way without any hardware specialist.
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Conference papers
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https://hal-ujm.archives-ouvertes.fr/ujm-00176081
Contributor : Virginie Fresse <>
Submitted on : Tuesday, October 2, 2007 - 1:10:24 PM
Last modification on : Wednesday, July 25, 2018 - 2:05:31 PM

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  • HAL Id : ujm-00176081, version 1

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L. Zhang, Virginie Fresse, A. Legrand. Rapid Prototyping of image analysis algorithms on an adaptive FPGA Architecture. EURASIP European Signal Processing Conference, EUSIPCO 2007, Sep 2007, Poznan, Poland. pp.841-845. ⟨ujm-00176081⟩

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