Embedded True Random Number Generator in Actel FPGA

Abstract : In high level security systems the unpredictability and unrepeatability of a random sequence is ensured by its generation in a true random number generator (TRNG) based on a physical phenomenon. Although the method based on randomness extraction from tracking jitter of phase-locked loop (PLL) is universal and applicable in wide scale of FPGAs or other digital circuits with analog PLLs, only implementations in Altera FPGAs were presented so far. This paper summarizes possible TRNG configurations and relation between PLL and TRNG parameters. Next, we analyze the possibility to implement presented class of TRNGs in Actel FPGAs and we provide the step-by-step instructions for the design of the TRNG in the selected family. The Actel FPGAs are shown to be a suitable target platform for the discussed type of TRNG.
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https://hal-ujm.archives-ouvertes.fr/ujm-00307738
Contributor : Viktor Fischer <>
Submitted on : Tuesday, July 29, 2008 - 1:39:05 PM
Last modification on : Wednesday, July 25, 2018 - 2:05:30 PM

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  • HAL Id : ujm-00307738, version 1

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Martin Simka, Milos Drutarovsky, Viktor Fischer. Embedded True Random Number Generator in Actel FPGA. workshop on Cryptographic Advances in Secure Hardware (CRASH 2005), Sep 2005, Leuven, Belgium. pp.W S8-3. ⟨ujm-00307738⟩

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