Secured TRBG with Embedded Randomness Testing

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Viktor Fischer

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Laboratoire Hubert Curien

FPGAs Jitter PLL Random number generators measurement

Cryptography and Security [cs.CR] Embedded Systems Electronics

https://hal-ujm.archives-ouvertes.fr/ujm-00368678

Submitted on : Tuesday, March 17, 2009-11:22:23 AM

Last modification on : Friday, March 24, 2023-2:52:51 PM

ujm-00368678 , version 1 (17-03-2009)

Viktor Fischer. Secured TRBG with Embedded Randomness Testing. cryptarchi 2006, Jun 2006, Kosice, Slovakia. ⟨ujm-00368678⟩