Secured TRBG with Embedded Randomness Testing

Viktor Fischer

Secured TRBG with Embedded Randomness Testing

Viktor Fischer ^{1, *}

* Corresponding author

1 LHC - Laboratoire Hubert Curien [Saint Etienne]

Keywords : FPGAs Jitter PLL Random number generators measurement

Document type :

Conference papers

Domain :

Computer Science [cs] / Cryptography and Security [cs.CR]

Computer Science [cs] / Embedded Systems

Engineering Sciences [physics] / Electronics

Complete list of metadatas

https://hal-ujm.archives-ouvertes.fr/ujm-00368678
Contributor : Viktor Fischer <>
Submitted on : Tuesday, March 17, 2009 - 11:22:23 AM
Last modification on : Wednesday, July 25, 2018 - 2:05:31 PM

Secured TRBG with Embedded Randomness Testing

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Secured TRBG with Embedded Randomness Testing

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