Implementation of True Random Number Generators in (Reconfigurable) Logic Devices

Viktor Fischer; Nathalie Bochard; Alain Aubert

Conference papers

Implementation of True Random Number Generators in (Reconfigurable) Logic Devices

Viktor Fischer ^{1, *} Nathalie Bochard ¹ Alain Aubert ¹

* Corresponding author

1 LHC - Laboratoire Hubert Curien [Saint Etienne]

Abstract : State of the art

keyword : FPGAs Random number generators Jitter measurement

Document type :

Conference papers

Domain :

Computer Science [cs] / Embedded Systems

Computer Science [cs] / Cryptography and Security [cs.CR]

Engineering Sciences [physics] / Electronics

Complete list of metadata

https://hal-ujm.archives-ouvertes.fr/ujm-00368929
Contributor : Viktor Fischer <>
Submitted on : Wednesday, March 18, 2009 - 8:27:42 AM
Last modification on : Tuesday, December 8, 2020 - 9:44:37 AM

Implementation of True Random Number Generators in (Reconfigurable) Logic Devices

Identifiers

Collections

Citation

Export

Metrics

78

Implementation of True Random Number Generators in (Reconfigurable) Logic Devices

Identifiers

Collections

Citation

Export

Share

Metrics

78