Embedded Monotoring of Robustness used for Ring Oscillator based TRNGs implemented in FPGA

Abstract : In this paper we present an embedded method for monitoring the properties of randomness sources used to generate random bit sequences used for cryptographical purposes, namely the timing jitter in ring oscillators. The method is based on the comparison of ideal (reference) histogram and histogram constructed from acquired jitter samples using Chi-Square tests. This method enables to issue an alarm signal if an abnormal behavior of jitter is observed. The aim of this work is to develop the system for fast examining of ring oscillators behavior embedded in various FPGA platforms regarding to power supply voltage and temperature variations. The method is designed for FPGA chips with a possibility of synthesizing the soft-core processors. The algorithm is written in a high level language and is portable to several embedded soft-core processors.
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https://hal-ujm.archives-ouvertes.fr/ujm-00374852
Contributor : Nathalie Bochard <>
Submitted on : Friday, April 10, 2009 - 8:10:37 AM
Last modification on : Wednesday, July 25, 2018 - 2:05:31 PM

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Michal Varchola, Boyan Valtchanov, Milos Drutarovský, Alain Aubert. Embedded Monotoring of Robustness used for Ring Oscillator based TRNGs implemented in FPGA. Conference on Design of Circuits and Integrated Systems - DCIS 2008, Nov 2008, Grneoble, France. pp.9B.2. ⟨ujm-00374852⟩

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