M. Bucci and R. ?luzzi, Design of Testable Random Bit Generators, Cryptographic Hardware and Embedded Systems?CHES '05, 7th International Workshop
DOI : 10.1007/11545262_11

K. , P. ?gaj, and K. , An embedded true random number generator for FPGAs, Proc. of the 2004 ACM/SIGDA 12th Internat. Symposium on Field Programmable Gate Arrays?FPGA 04, pp.71-78, 2004.

S. , B. ?martin, W. J. ?stinson, and D. R. , A provably secure true random number generator with built-in tolerance to active attacks, IEEE Trans. Comput, vol.56, pp.109-119, 2007.

D. , M. ?golic, and J. D. , High-speed true random number generation with logic gates only, in: Cryptographic Hardware and Embedded Systems?CHES '07, 9th, Lecture Notes in Comput. Sci, vol.4727, pp.45-62, 2007.

F. , V. ?drutarovsky, M. B. Kaliski, and J. , True random number generator embedded in reconfigurable hardware, in: Cryptographic Hardware and Embedded Systems?CHES '02, 9th Internat, Lecture Notes in Comput. Sci, vol.2523, pp.415-430, 2002.

F. , V. ?drutarovsky, M. ?simka, M. ?bochard, and N. , High performance true random number generator in altera stratix FPLDs, in: Field-Programmable Logic and Applications?FPL '04, 14th Internat, Conference Lecture Notes in Comput. Sci, vol.3203, pp.555-564, 2004.

E. , M. ?hars, L. ?krasinski, R. ?rosner, M. ?zheng et al., Design and implementation of a true random number generator based on digital circuit artifacts, in: Cryptographic Hardware and Embedded Systems?CHES '03, 5th Internat, Lecture Notes in Comput. Sci, vol.2779, pp.152-165, 2003.

V. , I. ?hambardzumyan, E. ?kim, Y. ?karpinskyy, and B. , Fast digital TRNG based on metastable ring oscillator, in: Cryptographic Hardware and Embedded Systems?CHES '08, 10th Internat, Lecture Notes in Comput. Sci, vol.5154, pp.164-180, 2008.

K. , W. ?schindler, and W. , AIS 31: Functionality classes and evaluation methodology for true (physical) random number generators, version 3, Bundesamt fur Sicherheit in der Informationstechnik (BSI), 2001.

S. , W. ?killmann, W. B. Kaliski, and J. , Evaluation criteria for true (physical) random number generators used in cryptographic applications, in: Cryptographic Hardware and Embedded Systems?CHES '02, 9th Internat, Lecture Notes in Comput. Sci, vol.2523, pp.431-449, 2003.

K. , W. ?schindler, and W. , A design for a physical RNG with robust entropy estimators, in: Cryptographic Hardware and Embedded Systems?CHES'08, 10th Internat, Lecture Notes in Comput. Sci, vol.5154, pp.146-163, 2008.

S. , M. ?drutarovsky, M. ?fischer, V. ?fayolle, and J. , Model of a true random number generator aimed at cryptographic applications, Proc. of the Internat. Symposium on Circuit and Systems?ISCAS '06, pp.5619-5623