Secured Reconfigurable Cryptographic Processor

Lubos Gaspar (1) , Viktor Fischer (1) , Florent Bernard (1)

1 LHC - Laboratoire Hubert Curien

This work presents reconfigurable processor aimed at symmetric-key cryptographic applications with architecture dedicated to the common cryptography tasks: 128-bit separated data and key registers, dedicated instruction set optimized for key generation and management, embedded cipher, etc. From the architecture point of view, the most important is the physical separation of data and key registers and buses, insuring that the confidential keys will never leave the system in clear. This way, the processor enables to separate red and black security zones easily. What is more, the goal is to achieve complete physical isolation of key management and data zones inside the single FPGA (required for security levels 3 and 4 as defined in FIPS-140-2 ).

Keywords: secured crypto-processor; register separation; key management; physical isolation; Xilinx SCC; Xilinx IVT

Domains: Embedded Systems; Cryptography and Security [cs.CR]

Lubos Gaspar, Viktor Fischer, Florent Bernard. Secured Reconfigurable Cryptographic Processor. PAca Security Trends In embedded Systems Workshop, PASTIS, Jun 2010, Gardanne, France. pp.NN. ⟨ujm-00533246⟩