HCrypt: A Novel Reconfigurable Crypto-processor with Secured Key Management

Abstract : The paper presents a novel concept of processor aimed at symmetric-key cryptographic applications. Its architecture is optimized for implementation of common cryptography tasks. The processor has 128-bit separated data and key registers, dedicated instruction set optimized for key generation and management, embedded cipher, and embedded random number generator. From an architectural point of view, the most important characteristic of the proposed crypto-processor is the physical separation of data and key registers and buses, insuring that confidential keys will never leave the system in clear. This way, the processor enables to separate protected and unprotected security zones easily and also achieve complete physical isolation of key management and data zones inside the single FPGA. The first version of the processor implemented in Xilinx Virtex 5 FPGA device achieves the frequency of 160 MHz and it occupies 1343 configurable logic blocks and 21 embedded memory blocks.
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Communication dans un congrès
International Conference on ReConFigurable Computing and FPGAs Reconfig 2010, Dec 2010, cancun, Mexico. IEEE Computer Society Conference Publishing Service (CPS), 978-0-7695-4314-7/10, pp.280-286, 2010, 〈10.1109/ReConFig.2010.38〉
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https://hal-ujm.archives-ouvertes.fr/ujm-00552139
Contributeur : Nathalie Bochard <>
Soumis le : mercredi 5 janvier 2011 - 15:34:02
Dernière modification le : mardi 16 janvier 2018 - 15:54:15

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Lubos Gaspar, Viktor Fischer, Florent Bernard, Lilian Bossuet, Pascal Cotret. HCrypt: A Novel Reconfigurable Crypto-processor with Secured Key Management. International Conference on ReConFigurable Computing and FPGAs Reconfig 2010, Dec 2010, cancun, Mexico. IEEE Computer Society Conference Publishing Service (CPS), 978-0-7695-4314-7/10, pp.280-286, 2010, 〈10.1109/ReConFig.2010.38〉. 〈ujm-00552139〉

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