Analysis and Enhancement of Ring Oscillators Based Physical Unclonable Functions in FPGAs

Crina Costea 1 Florent Bernard 1, * Viktor Fischer 1 Robert Fouquet 1
* Auteur correspondant
1 LHC - Laboratoire Hubert Curien [Saint Etienne]
Abstract : The paper analyzes and proposes some enhancements of Ring Oscillator based Physical Unclonable Functions (PUFs) that are used to extract a unique signature of an integrated circuit in order to be used for device authentication purposes and/or key generation. We analyze in more details the concept developed by Suh et al. in 2007. Contrary to what authors claim, we show that the designer of the Ring Oscillator PUFs implemented in FPGAs needs precise control of placement and routing in order to get unique responses and repeatable results for each individual device, especially when the rest of the reconfigurable device should remain upgradable. One main disadvantage of the original design is its high power consumption. We propose a simple improvement that reduces the consumption of the PUF published by Suh et al. by up to 96.6%. Last but not least, we point out that ring oscillators significantly influence one another and can even be locked. This questions the reliability of the PUF and should be taken into account during the design.
Keywords : Physical unclonable functions FPGA cryptographic key generation IC authentication
Type de document :
Communication dans un congrès
International Conference on ReConFigurable Computing and FPGAs Reconfig 2010, Dec 2010, cancun, Mexico. 978-0-7695-4314-7/10, pp.262-268, 2010, 〈10.1109/ReConFig.2010.63〉
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https://hal-ujm.archives-ouvertes.fr/ujm-00552143
Contributeur : Nathalie Bochard <>
Soumis le : mercredi 5 janvier 2011 - 15:40:44
Dernière modification le : mercredi 25 juillet 2018 - 14:05:31

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UNIV-ST-ETIENNE | LAHC | IOGS | PARISTECH

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Crina Costea, Florent Bernard, Viktor Fischer, Robert Fouquet. Analysis and Enhancement of Ring Oscillators Based Physical Unclonable Functions in FPGAs. International Conference on ReConFigurable Computing and FPGAs Reconfig 2010, Dec 2010, cancun, Mexico. 978-0-7695-4314-7/10, pp.262-268, 2010, 〈10.1109/ReConFig.2010.63〉. 〈ujm-00552143〉

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