generation of hardware emulation platforme for multi-FPGA based NoC

Zhiwei Ge (1) , Junyan Tan (2) , Virginie Fresse (2) , Frédéric Rousseau (3) , Sunying Yao (1)

1 ASIC Design Center - ASIC Design Center
2 LHC - Laboratoire Hubert Curien [Saint Etienne]
3 TIMA - Techniques de l'Informatique et de la Microélectronique pour l'Architecture des systèmes intégrés

Multi-FPGA based emulation platform for NoC (Network-on-Chip) gives a solution to the resource limitation of single FPGA based emulation platform. The generic design flow is needed to generate the emulation architecture for multi-FPGA based NoC.We propose a design flow that generates multi-FPGA based NoC. With the routing IP library for multi-FPGA based 3D NoC, the platform specification, the data transfer specification and emulation blocks, the generation tools can automatically generates a hardware emulation platform for multi-FPGA based NoC.

Domains: Computer Science [cs]; Embedded Systems

Zhiwei Ge, Junyan Tan, Virginie Fresse, Frédéric Rousseau, Sunying Yao. generation of hardware emulation platforme for multi-FPGA based NoC. Journées scientifiques 2011 du projet SEmba, Oct 2011, Valence, France. ⟨ujm-00634884⟩