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generation of hardware emulation platforme for multi-FPGA based NoC

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Abstract

Multi-FPGA based emulation platform for NoC (Network-on-Chip) gives a solution to the resource limitation of single FPGA based emulation platform. The generic design flow is needed to generate the emulation architecture for multi-FPGA based NoC.We propose a design flow that generates multi-FPGA based NoC. With the routing IP library for multi-FPGA based 3D NoC, the platform specification, the data transfer specification and emulation blocks, the generation tools can automatically generates a hardware emulation platform for multi-FPGA based NoC.
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Dates and versions

ujm-00634884 , version 1 (24-10-2011)

Identifiers

  • HAL Id : ujm-00634884 , version 1

Cite

Zhiwei Ge, Junyan Tan, Virginie Fresse, Frédéric Rousseau, Sunying Yao. generation of hardware emulation platforme for multi-FPGA based NoC. Journées scientifiques 2011 du projet SEmba, Oct 2011, Valence, France. ⟨ujm-00634884⟩
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