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Conference papers

generation of hardware emulation platforme for multi-FPGA based NoC

Abstract : Multi-FPGA based emulation platform for NoC (Network-on-Chip) gives a solution to the resource limitation of single FPGA based emulation platform. The generic design flow is needed to generate the emulation architecture for multi-FPGA based NoC.We propose a design flow that generates multi-FPGA based NoC. With the routing IP library for multi-FPGA based 3D NoC, the platform specification, the data transfer specification and emulation blocks, the generation tools can automatically generates a hardware emulation platform for multi-FPGA based NoC.
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Conference papers
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https://hal-ujm.archives-ouvertes.fr/ujm-00634884
Contributor : Virginie Fresse Connect in order to contact the contributor
Submitted on : Monday, October 24, 2011 - 11:25:54 AM
Last modification on : Saturday, June 25, 2022 - 7:25:54 PM

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  • HAL Id : ujm-00634884, version 1

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Zhiwei Ge, Junyan Tan, Virginie Fresse, Frédéric Rousseau, Sunying yao. generation of hardware emulation platforme for multi-FPGA based NoC. Journées scientifiques 2011 du projet SEmba, Oct 2011, Valence, France. ⟨ujm-00634884⟩

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