B. Badrignans, J. L. Danger, V. Fischer, G. Gogniat, and L. Torres, Security Trends for FPGAs, pp.101-135, 2011.
DOI : 10.1007/978-94-007-1338-3

URL : https://hal.archives-ouvertes.fr/lirmm-00616973

M. Baudet, D. Lubicz, J. Micolod, and A. Tassiaux, On the security of oscillatorbased random number generators, Journal of Cryptology, vol.24, pp.1-28, 2010.
URL : https://hal.archives-ouvertes.fr/hal-00584405

F. Bernard, V. Fischer, and B. Valtchanov, Mathematical model of physical RNGs based on coherent sampling, Tatra Mountains Mathematical Publications, vol.45, issue.1, pp.1-14, 2010.
DOI : 10.2478/v10127-010-0001-1

URL : https://hal.archives-ouvertes.fr/ujm-00531665

N. Bochard, F. Bernard, V. Fischer, and B. Valtchanov, True-Randomness and Pseudorandomness in Ring Oscillator-Based True RandomNumber Generators, International Journal ofReconfigurable Computing, p.13, 2010.

N. Bochard and V. Fischer, A set of evaluation boards aimed at TRNG design evaluation and testing, 2012.

M. Bucci and R. Luzzi, Design of Testable Random Bit Generators, Cryptographic Hardware and Embedded Systems -CHES 2005, pp.147-156, 2005.
DOI : 10.1007/11545262_11

J. L. Danger, S. Guilley, and P. Hoogvorst, High speed true random number generator based on open loop structures in FPGAs, Microelectronics Journal, vol.40, issue.11, pp.1650-1656, 2009.
DOI : 10.1016/j.mejo.2009.02.004

M. Dichtl and J. Golic, High-Speed True Random Number Generation with Logic Gates Only, Cryptographic Hardware and Embedded Systems -CHES 2007, pp.45-61, 2007.
DOI : 10.1007/978-3-540-74735-2_4

V. Fischer and M. Drutarovsky, True Random Number Generator Embedded in Reconfigurable Hardware, Cryptographic Hardware and Embedded Systems - CHES 2002, pp.415-430, 2002.
DOI : 10.1007/3-540-36400-5_30

URL : http://citeseerx.ist.psu.edu/viewdoc/summary?doi=

T. Güneysu, True random number generation in block memories of reconfigurable devices, 2010 International Conference on Field-Programmable Technology, pp.200-207, 2010.
DOI : 10.1109/FPT.2010.5681499

T. Gyorfi, O. Cret, and A. Suciu, High performance true random number generator based on FPGA block RAMs, 2009 IEEE International Symposium on Parallel & Distributed Processing, pp.1-8, 2009.
DOI : 10.1109/IPDPS.2009.5161207

A. Hajimiri and T. Lee, A general theory of phase noise in electrical oscillators. Solid- State Circuits, IEEE Journal, vol.33, issue.2, pp.179-194, 1998.

J. Holleman, B. Otis, S. Bridges, A. Mitros, and C. Diorio, A 2.92 muW Hardware Random Number Generator, IEEE Proceedings of ESSCIRC, 2006.
URL : https://hal.archives-ouvertes.fr/jpa-00253788

W. Killmann and W. Schindler, AIS 31: Functionality classes and evaluation methodology for true (physical) random number generators, version 3.1, Bundesamt fur Sicherheit in der Informationstechnik (BSI), 2001.

W. Killmann, W. P. Schindler, and K. Gaj, A proposal for: Functionality classes for random number generators, version 2 An Embedded True Random Number Generator for FPGAs, Tech. rep., Bundesamt fur Sicherheit in der Informationstechnik (BSI) Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays pp, pp.71-78, 2004.

M. Majzoobi, F. Koushanfar, and S. Devadas, FPGA-Based True Random Number Generation Using Circuit Metastability with Adaptive Feedback Control, Cryptographic Hardware and Embedded Systems ? CHES 2011, pp.17-32, 2011.
DOI : 10.1007/978-3-642-23951-9_2

G. Marsaglia, DIEHARD: Battery of Tests of Randomness. Online Available at, 1996.

A. Rukhin, J. Soto, J. Nechvatal, J. Smid, E. Barker et al., A statistical test suite for random and pseudorandom number generators for cryptographic applications, nist special publication 800-22. Online. Available at: http://csrc, 2001.

R. Santoro, O. Sentieys, and S. Roy, On-line monitoring of random number generators for embedded security. Circuits and Systems, ISCAS 2009. Proceedings. IEEE International Symposium on, 2009.
URL : https://hal.archives-ouvertes.fr/inria-00446036

M. Simka, M. Drutarovsky, V. Fischer, and J. Fayolle, Model of a True Random Number Generator Aimed at Cryptographic Applications. Circuits and Systems, ISCAS 2006. Proceedings. 2006 IEEE International Symposium on p, p.4, 2006.
URL : https://hal.archives-ouvertes.fr/ujm-00307647

B. Sunar, W. Martin, and D. Stinson, A Provably Secure True Random Number Generator with Built-In Tolerance to Active Attacks, IEEE Transactions on Computers, vol.56, issue.1, pp.109-119, 2007.
DOI : 10.1109/TC.2007.250627

T. Tkacik, A Hardware Random Number Generator, Cryptographic Hardware and Embedded Systems -CHES 2002, pp.450-453, 2003.
DOI : 10.1007/3-540-36400-5_32

B. Valtchanov, A. Aubert, F. Bernard, and V. Fischer, Characterization of randomness sources in ring oscillator-based true random number generators in FPGAs. Design and Diagnostics of Electronic Circuits and Systems, pp.1-6, 2008.
URL : https://hal.archives-ouvertes.fr/ujm-00470240

M. Varchola and M. Drutarovsky, Embedded Platform for Automatic Testing and Optimizing of FPGA Based Cryptographic True Random Number Generators, RADIOENGINEERING, vol.18, issue.4, pp.631-638, 2009.

M. Varchola and M. Drutarovsky, New High Entropy Element for FPGA Based True Random Number Generators, Cryptographic Hardware and Embedded Systems ? CHES 2010, pp.351-365, 2010.
DOI : 10.1007/978-3-642-15031-9_24

F. Veljkovic, V. Rozic, and I. Verbauwhede, Low-cost implementations of on-the-fly tests for random number generators, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012.
DOI : 10.1109/DATE.2012.6176635

K. Wold and C. H. Tan, Analysis and Enhancement of Random Number Generator in FPGA Based on Oscillator Rings, International Conference on Reconfigurable Computing and FPGAs pp, pp.385-390, 2008.