Two IP Protection Schemes for Multi-FPGA Systems

Abstract : This paper proposes two novel protection schemes for multi-FPGA systems providing high security of IP designs licensed by IP vendors to system integrators and installed remotely in a hostile environment. In the first scheme, these useful properties are achieved by storing two different configuration keys inside an FPGA, while in the second scheme, they are obtained using a hardware white-box cipher for creating a trusted environment. Thanks to the proposed principles, FPGA configurations coming from different IP owners cannot be cloned or reverse-engineered by any involved party, including system integrator and other IP owners. The proposed schemes can be directly implemented in recent FPGAs such as Xilinx Spartan 6 and Virtex 6.
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Communication dans un congrès
ReConFig' 12, Dec 2012, cancun, Mexico. pp.2568809, 2012
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  • HAL Id : ujm-00763142, version 1

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Lubos Gaspar, Viktor Fischer, Tim Guneysu, Zouha Cherif. Two IP Protection Schemes for Multi-FPGA Systems. ReConFig' 12, Dec 2012, cancun, Mexico. pp.2568809, 2012. 〈ujm-00763142〉

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