Evariste II : Modular hardware system for fair TRNG benchmarking

Abstract : True Random Number Generators (TRNG) are cryptographic primitives that exploit intrinsic noise sources in electronic devices. Their quality is linked to the underlying technology, activity of the neighboring circuitry and device environment (temperature, power supply, electromagnetic emanations). Consequently, when comparing TRNGs, they should be tested in identical technology, system architecture and operating conditions. We present a unified hardware platform and related open source tools aimed at fair benchmarking of TRNGs implemented in different FPGA technologies. The platform is accessible remotely. Designers can download related tools from the web site and upload their design to the remote FPGA and download random bitstreams generated in the same hardware and in the same conditions as other concurrent designs and state-of-the-art generators. The proposed tools were approved in many applications and they guarantee safe acquisition of random bitstreams at data rates of up to 400 Mbits/s.
Type de document :
Communication dans un congrès
International Workshops on Cryptographic Architectures Embedded in Reconfigurable Devices - Cryptarchi 2013, Jun 2013, Fréjus, France
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https://hal-ujm.archives-ouvertes.fr/ujm-00840987
Contributeur : Nathalie Bochard <>
Soumis le : mercredi 3 juillet 2013 - 16:04:41
Dernière modification le : mercredi 25 juillet 2018 - 14:05:31

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  • HAL Id : ujm-00840987, version 1

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Viktor Fischer, Nathalie Bochard. Evariste II : Modular hardware system for fair TRNG benchmarking. International Workshops on Cryptographic Architectures Embedded in Reconfigurable Devices - Cryptarchi 2013, Jun 2013, Fréjus, France. 〈ujm-00840987〉

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