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Université Jean Monnet – Saint-Etienne |  |
Conference papers
A Low-Area Filter Bank Design Methodology for On-Chip ADC Testing
Abstract : This paper focused on a filter bank study used for ADC BIST. Filter selection to separate spectral components of an analog-to-digital converted signal are discussed. Regarding the BIST context, a method to realize the lowest cost filter bank is proposed. This task has been done taking into account the wordlenght of the input and clock frequencies and the filter coefficient values.
https://hal-ujm.archives-ouvertes.fr/ujm-00552169
Contributor : Lilian Bossuet <>
Submitted on : Wednesday, January 5, 2011 - 4:05:17 PM
Last modification on : Monday, January 13, 2020 - 5:46:03 PM
Contributor : Lilian Bossuet <>
Submitted on : Wednesday, January 5, 2011 - 4:05:17 PM
Last modification on : Monday, January 13, 2020 - 5:46:03 PM
